Talk Title: Unbounded Transactional Memory
Speaker:    Bradley C. Kuszmaul
Date:       10/5/2005

Abstract:
In this talk, I argue that hardware transactional memory should
support *unbounded transactions*: transactions of arbitrary size and
duration.  Our team designed a hardware implementation of unbounded
transactional memory, called UTM, which exploits the common case for
performance without sacrificing correctness on transactions whose
footprint can be nearly as large as virtual memory.  We also designed
a "smaller" version, called LTM, that scales only up to the size of
physical memory but is pin-compatible with today's microprocessors.

We assessed UTM and LTM through microbenchmarking and by automatically
converting the SPECjvm98 Java benchmarks and the Linux 2.4.19 kernel
to use transactions instead of locks.  We use both cycle-accurate
simulation and instrumentation to understand benchmark behavior.  Our
studies show that the common case is small transactions that commit,
even when contention is high, but that some applications contain very
large transactions.  For example, although 99.9% of transactions in
the Linux study touch 54 cache lines or fewer, some transactions
touch over 8000 cache lines.  Our studies also indicate that
hardware support is required, because some applications spend over
half their time in critical regions.  Finally, they suggest that
hardware support for transactions can make Java programs run faster
than when run using locks and can increase the concurrency of the
Linux kernel by as much as a factor of 4 with no additional
programming work.


Bio:

Bradley C. Kuszmaul is a research scientist in the Supercomputing
Technologies Group at the MIT Computer Science and Artificial
Intelligence Laboratory (CSAIL).  He is one of the developers of the
Cilk multithreaded programming environment, is the coauthor of several
prize-winning parallel chess programs, and developed a theory of
asymptotically optimal circuits for out-of-order superscalar
processors.  He was one of the principal architects of the Connection
Machine CM-5 supercomputer at Thinking Machines Corporation, and lead
the development the Akamai Technologies network usage database.  He is
currently investigating cache-oblivious data structures and
transactional memory.